1.
Optimized Hardware-Software Co-Design for Kyber and Dilithium on RISC-V SoC FPGA. TCHES [Internet]. 2024 Jul. 18 [cited 2024 Dec. 23];2024(3):99-135. Available from: https://ojs.ub.rub.de/index.php/TCHES/article/view/11671