SAT-based Formal Verification of Fault Injection Countermeasures for Cryptographic Circuits. IACR Transactions on Cryptographic Hardware and Embedded Systems, [S. l.], v. 2024, n. 4, p. 1–39, 2024. DOI: 10.46586/tches.v2024.i4.1-39. Disponível em: https://ojs.ub.rub.de/index.php/TCHES/article/view/11782.. Acesso em: 21 nov. 2024.