Optimized Hardware-Software Co-Design for Kyber and Dilithium on RISC-V SoC FPGA. IACR Transactions on Cryptographic Hardware and Embedded Systems, [S. l.], v. 2024, n. 3, p. 99–135, 2024. DOI: 10.46586/tches.v2024.i3.99-135. Disponível em: https://ojs.ub.rub.de/index.php/TCHES/article/view/11671.. Acesso em: 23 dec. 2024.