Masking Floating-Point Number Multiplication and Addition of Falcon: First- and Higher-order Implementations and Evaluations. IACR Transactions on Cryptographic Hardware and Embedded Systems, [S. l.], v. 2024, n. 2, p. 276–303, 2024. DOI: 10.46586/tches.v2024.i2.276-303. Disponível em: https://ojs.ub.rub.de/index.php/TCHES/article/view/11428.. Acesso em: 21 nov. 2024.